The present invention relates generally to semiconductor integrated circuit devices, and in particular, the present invention relates to pulse generators for developing control signals in a semiconductor memory device.
Pulse generators are useful in a number of semiconductor integrated circuit devices to control time delays between operations or to control the length of an operation or a phase of that operation. One particular type of semiconductor integrated circuit device is a memory device.
Semiconductor memory devices are rapidly-accessible memory devices. In a semiconductor memory device, the time required for storing and retrieving information generally is independent of the physical location of the information within the memory device. Semiconductor memory devices typically store information in a large array of cells. A group of cells are electrically connected together by a bit line, or data line. An electrical signal is used to program a cell or cells.
Computer, communication and industrial applications are driving the demand for memory devices in a variety of electronic systems. One important form of semiconductor memory device includes a non-volatile memory made up of floating-gate memory cells called flash memory. Computer applications use flash memory to store BIOS firmware. Peripheral devices such as printers store fonts and forms on flash memory. Digital cellular and wireless applications consume large quantities of flash memory and are continually pushing for lower voltages and higher densities. Portable applications such as digital cameras, audio recorders, personal digital assistants (PDAs) and test equipment also use flash memory as a medium to store data.
As operating voltages continue to decrease, operation of the memory device must come under tighter constraints. Lower operating voltages lead to lower operating margins. In turn, lower operating margins require tighter controls in time-dependent operations.
Timing of operations within a memory device is often regulated by a timing pulse or other control signal generated by a pulse generator. Timing pulses having durations that are relatively stable across a wide range of operating conditions are preferred. If a timing pulse shows excessive variation across anticipated operating conditions, the designer must build in delays to avoid entering or leaving a phase of operation too early. These intentional delays degrade the potential performance of the memory device.
One common pulse generator is a ramp comparator. FIG. 1 depicts an example of a pulse generator 100 as a simple ramp comparator. Typical ramp comparators include a comparator 110 whose output is generated in response to a difference between a ramp signal from a ramp signal generator 150 and a threshold signal from a threshold signal generator 170. Such ramp comparators are often used to develop a timing pulse. The duration of the pulse is dependent upon the level of the threshold signal, the initial value of the ramp signal and the slope of the ramp signal.
For integrated circuits, the threshold signal for a ramp comparator is typically a voltage signal such as a supply voltage or some internally-generated voltage. One example of a threshold signal generator 170 is shown in FIG. 1 configured as a voltage divider. The threshold signal generator 170 is fed by a first potential node 172 on a high end and a second potential node 174 on a low end. The first potential node 172 may be coupled to receive a supply potential such as Vcc. The second potential node 174 may be coupled to receive a ground potential such as Vss. The threshold signal generator 170 has an upper resistive component 176 in series with a lower resistive component 178. The upper resistive component 176 is located between the first potential node 172 and an output node 180. The lower resistive component 178 is located between the second potential node 174 and the output node 180.
The threshold signal is provided at the output node 180. The potential level of the threshold signal is between the potential level of the first potential node 172 and the potential level of the second potential node 174 and can be adjusted through selection of the resistance values of the upper resistive component 176 and the lower resistive component 178 as is well known in the art. In general, the output of the threshold signal generator 170, V0, can be described by the function, V0=(Rl/(Rl+Ru))*(Vhxe2x88x92Vl)+Vl, where Rl is the resistance of the lower resistive component 178, Ru is the resistance of the upper resistive component 176, Vh is the potential received at the first potential node 172, and Vl is the potential received at the second potential node 174.
The ramp signal is often generated using a ramp signal generator 150 having a resistive-capacitive (RC) circuit. In the example of FIG. 1, the ramp signal generator 150 is depicted as having a resistive component 156 coupled between a first potential node 152 and an output node 160. The ramp signal generator 150 further has a capacitive component 158 coupled between a second potential node 154 and the output node 160. The ramp signal provided at the output node 160 is responsive to an input signal, such as a supply voltage from the first potential node 152. Such RC circuits are highly reliable and are easy to design and fabricate, but they are also generally sensitive to changes in the voltage level of the input signal as well as to changes in ambient temperature. A pulse generator 100 whose ramp signal is sensitive to changes in ambient temperature may exhibit unacceptable variation in timing characteristics within anticipated operating temperatures.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative pulse generators exhibiting compensation for supply voltage as well as ambient temperature, memory devices containing such pulse generators, and methods of their operation.
The above-mentioned problems with memory devices and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
Ramp comparator pulse generators of the various embodiments have temperature and voltage compensation and are adapted for use in integrated circuit devices such as memory devices. They are particularly adapted for low-voltage memory devices, e.g., those operating at supply voltages of 1.6-2.2V or less, where operating margins are reduced. Such pulse generators include a ramp signal generator, a threshold signal generator, and a comparator providing an output signal in response to a difference between the potential level of the threshold signal and the potential level of the ramp signal.
The pulse generators described herein utilize an adaptive threshold signal generator configured as a voltage divider and having resistive components having differing effective temperature coefficients of resistivity. The adaptive threshold signal generator has an upper resistive component and a lower resistive component coupled in series between a high potential and a low potential. The lower resistive component has an effective temperature coefficient of resistivity that is less than an effective temperature coefficient of resistivity of the upper resistive component. For ramp signal generators making use of typical RC circuits, the various embodiments exhibit similar voltage compensation and improved temperature compensation over pulse generators utilizing voltage dividers having upper and lower resistive components with substantially identical effective temperature coefficients of resistivity.
For one embodiment, the invention provides a pulse generator having a comparator whose output is generated in response to a difference between a potential level of a ramp signal from a ramp signal generator and a potential level of a threshold signal from a threshold signal generator. The threshold signal generator includes an upper resistive component coupled between a first potential node and an output node of the threshold signal generator. The threshold signal generator further includes a lower resistive component coupled between a second potential node and the output node of the threshold signal generator. The upper resistive component has a first effective temperature coefficient of resistivity and the lower resistive component has a second effective temperature coefficient of resistivity lower than the first effective temperature coefficient of resistivity.
For another embodiment, the invention provides a pulse generator having a comparator whose output is generated in response to a difference between a potential level of a ramp signal from a ramp signal generator and a potential level of a threshold signal from a threshold signal generator. The threshold signal generator includes an upper resistive component coupled between a first potential node and an output node of the threshold signal generator. The threshold signal generator further includes a lower resistive component coupled between a second potential node and the output node of the threshold signal generator. The upper resistive component has a first effective temperature coefficient of resistivity and the lower resistive component has a second effective temperature coefficient of resistivity lower than the first effective temperature coefficient of resistivity. The lower resistive component includes a bipolar junction transistor having a base coupled to the output of the threshold signal generator, a collector coupled to the output of the threshold signal generator, and an emitter. The lower resistive component further includes a resistive element coupled in parallel with the bipolar junction transistor, having an input coupled to the collector of the bipolar junction transistor and an output coupled to the emitter of the bipolar junction transistor. The lower resistive component still further includes a resistive element coupled in series with the bipolar junction transistor, having an input coupled to the emitter of the bipolar junction transistor and an output coupled to the second potential node through a selective coupling device, wherein the selective coupling device is selectively activated in response to a control signal.
For yet another embodiment, the invention provides a method of generating an output signal having a pulse duration. The method includes generating a threshold signal having a potential level, wherein the threshold signal is generated at the output of a voltage divider having an upper resistive component and a lower resistive component, and wherein the lower resistive component has an effective temperature coefficient of resistivity lower than an effective temperature coefficient of resistivity of the upper resistive component. The method further includes generating a ramp signal having a potential level and resetting the ramp signal to an initial potential level. The method still further includes generating the output signal in response to a difference between the potential level of the threshold signal and the potential level of the ramp signal. The output signal has a first logic level at the time of resetting the ramp signal, the output signal transitions to a second logic level after the ramp signal assumes the initial potential level, and the output signal transitions back to the first logic level when the potential level of the threshold signal exceeds the potential level of the ramp signal by less than a predetermined difference.
For further embodiments, the invention provides memory devices and electronic systems containing pulse generators of the type described herein. The invention further provides methods and apparatus of varying scope.